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Job Description:

We are looking for bright, motivated, innovative, and hardworking engineers to join our top notch
engineering team. You will work closely with marketing, architecture, firmware, physical and layout
teams on full product development cycle from definition to production. You will be challenged and gain
valuable experience towards enhancing a successful career in ASIC design.
You will involve in engineering implementation spec writing from marketing/system requirements, RTL
design and verification, synthesis, static timing analysis. You will either be responsible for block and/or
chip level design and integration.
Job Requirements BSEE/MSEE. Minimum 8 years of experience developing, implementing, and testing
high performance communications/networking ASIC products.

understanding of system design tradeoffs for high volume applications.
Must have good RTL experience including specification, design, verification, and synthesis. Must have
strong UNIX-based EDA tool skills and knowledge of ASIC design flows. Must be familiar with reusable
HDL coding styles and design for high volume manufacture.
Must be efficient in the following skills:

• Verilog/VHDL coding and Lint tools
• Synthesis using Synopsys tool suite
• Timing Analysis using Synopsys Primetime tool
• Formal Verification
• DFT concepts of Scan, BIST.
• Strong Perl and Tcl scripting skill

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.