refresh

트렌딩 기업

트렌딩

채용

JobsBroadcom

IP DFT Verification Engineer

Broadcom

IP DFT Verification Engineer

Broadcom

IND-Bangalore Electronic City - S1

·

On-site

·

Full-time

·

1w ago

Required Skills

DFT

MBIST

ATPG

Perl

Python

TCL

Simulation

Analog circuit design

Digital circuit design

Please Note:

1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)

2. If you already have a Candidate Account, please Sign-In before you apply.

Job Description:

Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead Engineer position at our Bangalore Development Center. We are seeking a highly skilled HBM and Ser Des DFT Verification Engineer to join our dynamic team. In this role, you will play a crucial part in ensuring the robustness and reliability of our HBM, DDR and Ser Des designs through comprehensive Design for Test (DFT) verification strategies. You will work collaboratively with cross-functional teams to develop, implement, and validate DFT methodologies, guaranteeing that our products meet the highest quality standards.

Key Responsibilities:

Implement and verify DFT methodologies specifically for HBM, DDR and Ser Des designs.

Collaborate with design and architecture teams to identify and define critical testability requirements.

Utilize advanced simulation tools and methodologies to thoroughly verify DFT implementations.

Analyze DFT-related data and provide insights for continuous design improvements.

Document verification processes, results, and best practices to enhance team knowledge and efficiency.

Stay updated with the latest trends and technologies in DFT, HBM, and Ser Des to drive innovation within the team.

Working closely with STA and DI Engineers design closure for test

Generating, Verifying & Debugging Test vectors before tape release.

Validating & Debugging Test vectors on ATE during the silicon bring up phase

Assisting with silicon failure analysis, diagnostics & yield improvement efforts

Interfacing with the customers, physical design and test engineering/manufacturing teams located globally

Working closely with I/P DFT engineers & other stakeholders

Debugging customer returned parts on the ATE

Innovating newer DFT solutions to solve testability problems in 3nm IPs & beyond

Automating DFT & Test Vector Generation flows:

Skills/Experience:

Strong DFT background (such as Analog DFT, MBIST, IEEE1687 and others)

Proven experience in DFT verification, particularly with HBM, DDR, PCIE and other Ser Des IPs.

Understanding of DFT methodologies, including scan, BIST, and ATPG.

Proficiency in simulation tools and scripting languages (e.g., Perl, Python, TCL and ruby).

Excellent analytical and problem-solving skills.

Strong communication and teamwork abilities.

The ability to work in a multi-disciplined, cross-department environment

Solid knowledge in analog and digital circuit design, and device physics fundamentals

Excellent problem solving, debug , root cause analysis and communication skills

Experience working on ATE is a plus

Familiarity with BIST logic for array and link testing is a plus

Knowledge of AHB/APB/AXI buses is a plus

Education & Experience:

Bachelors in Electrical/Electronic/Computer Engineering and 8+ years of relevant industry experience or Masters Degree in Electrical/Electronic/Computer Engineering and 6+ years of relevant industry experience

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Total Views

0

Apply Clicks

0

Mock Applicants

0

Scraps

0

About Broadcom

Broadcom

A designer, developer, and global supplier of a broad range of analog and digital semiconductor connectivity solutions.

10,001+

Employees

Palo Alto

Headquarters

Reviews

3.0

10 reviews

Work Life Balance

2.2

Compensation

4.1

Culture

2.3

Career

1.8

Management

2.1

25%

Recommend to a Friend

Pros

Good pay and compensation

Quality benefits package

Equity/RSUs offered

Cons

No career advancement opportunities

Poor management quality and leadership

Frequent layoffs and job insecurity

Salary Ranges

1,961 data points

Mid/L4

Mid/L4 · Infrastructure Engineer

1 reports

$219,086

total / year

Base

$168,682

Stock

-

Bonus

-

$219,086

$219,086

Interview Experience

2 interviews

Difficulty

3.0

/ 5

Duration

14-28 weeks

Experience

Positive 0%

Neutral 50%

Negative 50%

Interview Process

1

Interview

2

Multiple rounds