채용
Benefits & Perks
•Parental leave
•Creative environment
•Design tool subscriptions
•Remote options
•Competitive salary and equity
•Parental Leave
Required Skills
Framer
Figma
Sketch
About the Role
Imagine yourself at the center of our SOC design effort, collaborating with all fields, with a critical impact and playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new ideas, as well as work with a team of hardworking engineers.
As part of our Digital group, you'll take imaginative and revolutionary ideas and determine how to turn them into reality. You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Your efforts will be groundbreaking, often literally.
You will be part of an exciting silicon design group that is responsible for designing state-of-the-art ASICs. We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low power SOC.
Responsibilities
- Develop custom circuits to improve chip power efficiency
- Work with power team, PD and architects to define specifications and requirements
- Perform design, analysis, modeling/simulation, circuit level specifications, schematic capture, spice simulation / margin verification across PVT, statistical design, functional verification and silicon bring up
- Work closely with layout team to complete the design and oversee the layout quality
- Develop / drive circuit methodology to achieve the highest design quality metrics
Minimum Qualifications
- BS and a minimum of 10 years of relevant industry experience
Preferred Qualifications
- Design experience in advanced technology nodes
- Experience in design of low voltages / low power custom circuits
- Experience in one or multiple of the following areas: Machine learning accelerators, SRAM circuits, non-volatile memories, weak / moderate inversion circuits, ultra-low power amplifiers, DC/DC converters, digital on-chip sensors, high speed clocking, time to digital converters (TDCs)
- Deep understanding of deep submicron device physics, leakage mechanisms, technology interactions with device behavior
- Solid understanding of device matching, device noise sources (1/f, thermal), extrinsic noise sources (supply, jitter), and their impact on high precision circuit
- Ability to conduct experiments during silicon debug, gathering and analyzing data; and utilize scripting to support efficient handling of ATE data
- Familiarity with mixed signal verification and behavioral models for mixed signal blocks
- Proficiency in scripting languages (Python /Perl or others) and CAD automation tools
- Knowledge of industry standard circuit and design tools
Equal Opportunity
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
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About Apple

Apple
PublicA technology company that designs, manufactures, and markets consumer electronics, personal computers, and software.
10,001+
Employees
Cupertino
Headquarters
$3.5T
Valuation
Reviews
4.0
10 reviews
Work Life Balance
4.0
Compensation
4.2
Culture
3.8
Career
3.5
Management
3.2
75%
Recommend to a Friend
Pros
Great coworkers and people
Excellent benefits and perks
Fast-paced and engaging work environment
Cons
High expectations and pressure
Management quality varies
Limited career progression opportunities
Salary Ranges
17,968 data points
L2
L3
L4
L5
L6
L2 · Business Analyst L2
0 reports
$114,215
total / year
Base
$45,686
Stock
$57,108
Bonus
$11,422
$79,951
$148,480
Interview Experience
5 interviews
Difficulty
3.4
/ 5
Duration
28-42 weeks
Offer Rate
20%
Experience
Positive 20%
Neutral 40%
Negative 40%
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Behavioral Interview
5
Onsite/Virtual Interviews
6
Team Matching
7
Offer
Common Questions
Coding/Algorithm
System Design
Behavioral/STAR
Technical Knowledge
Culture Fit
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