RTL Design Engineer

About the Role

At Apple, we work every day to craft products that enrich people's lives. If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design career and challenge yourself in a technical and multi-disciplinary endeavor? If so, this is an exciting position in the world class Apple mixed-signal silicon design team!

This role will build upon your solid foundation in digital logic circuits while introducing mixed signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry.

As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits.

Responsibilities

• Specify and/or micro-architect digital blocks in sophisticated mixed-signal circuits
• RTL coding of blocks specified by you or others
• Participate in design verification and bring-up of blocks by writing meaningful assertions, debugging code, and interacting with the design verification team
• Contribute to lab bring-up of circuits by writing test scripts, analyzing lab data, and proposing experiments

Preferred Qualifications

• Proven knowledge of RTL design, Verilog and System Verilog
• Deep knowledge of front-end tools (Verilog simulators, linters, CDC, RDC, LEQ, UPF)
• Low power design methodologies and techniques to reduce dynamic and static IC power
• ECO design flows and methodologies
• Proven understanding of mixed signal concepts and experience with analog circuit behavioral modeling
• Proven knowledge of synthesis, static timing and DFT
• Proven knowledge of System Verilog assertions, checkers, and other design verification techniques
• Knowledge of scripting languages (i.e. Perl, JSON and Python)
• Using GenAI tools (e.g., large language models, AI-assisted code generation) to design, validate, and optimize System Verilog RTL code
• Digital signal processing fundamentals including signal processing concepts
• Strong communication and presentation skills

Minimum Qualifications

• BS and a minimum of 10 years relevant industry experience

Equal Opportunity

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.