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Benefits & Perks
•401(k) matching
•Parental leave
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•Professional development budget
•Generous paid time off and holidays
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•Parental Leave
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Required Skills
PostgreSQL
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About Us
Working at Apple means doing more than you ever thought possible and having more impact than you ever imagined.
Size: 10000+ employees
Industry: Technology, Information Technology, Software, Consumer Goods & Services
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple product!
Apple's Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the i Phone, i Pad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU integer, floating-point, and/or load/store execution for our performant cores.
Description
As a CPU Microarchitect/RTL Engineer, you will own or participate in the following:
-
Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification
-
RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals
-
Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification
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Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance
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Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power
Preferred Qualifications
Expertise in one or more of the following areas: out-of-order execution, instruction scheduling, integer and floating point execution, load/store execution, cache and memory subsystems
Understanding of low power microarchitecture techniques
Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
Experience in C or C++ programming
Experience using an interpretive language such as Perl or Python
Minimum Qualifications
Minimum BS and 10+ years of relevant industry experience
Experience with microprocessor architecture
Experience with logic design principles with timing and power implications
Experience in Verilog or VHDL:
Experience with simulators and waveform debugging process
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .
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Client-provided location(s): Beaverton, OR
Job ID: apple-200628491-0505_rxr-660
Employment Type: OTHER
Posted: 2026-01-07T19:12:54
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About Apple

Apple
PublicA technology company that designs, manufactures, and markets consumer electronics, personal computers, and software.
10,001+
Employees
Cupertino
Headquarters
$3.5T
Valuation
Reviews
4.0
10 reviews
Work Life Balance
4.0
Compensation
4.2
Culture
3.8
Career
3.5
Management
3.2
75%
Recommend to a Friend
Pros
Great coworkers and people
Excellent benefits and perks
Fast-paced and engaging work environment
Cons
High expectations and pressure
Management quality varies
Limited career progression opportunities
Salary Ranges
17,968 data points
L2
L3
L4
L5
L6
M3
M4
M5
M6
L2 · Industrial Designer L2
0 reports
$320,450
total / year
Base
$128,180
Stock
$160,225
Bonus
$32,045
$224,315
$416,585
Interview Experience
5 interviews
Difficulty
3.4
/ 5
Duration
28-42 weeks
Offer Rate
20%
Experience
Positive 20%
Neutral 40%
Negative 40%
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Behavioral Interview
5
Onsite/Virtual Interviews
6
Team Matching
7
Offer
Common Questions
Coding/Algorithm
System Design
Behavioral/STAR
Technical Knowledge
Culture Fit
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