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SerDes Circuit Design Engineer

Apple

SerDes Circuit Design Engineer

Apple

Beaverton, OR

·

On-site

·

Full-time

·

1mo ago

Benefits & Perks

Parental leave

Design tool subscriptions

Competitive salary and equity

Conference budget

Remote options

Parental Leave

Required Skills

Principle

Figma

InVision

We are seeking talented Analog Mixed-Signal designers to join our high-speed Ser Des team! Our team specializes in building next generation high-performance wireline transceivers delivering intellectual-property (IP) for Apple's world-leading system-on-chip (SOC).

In this role, you will actively work with cross-functional Analog Mixed-Signal design teams to create and execute on state-of-the-art IPs key to Apple's products. You will be challenged to make the best-in-class designs to surprise and delight Apple customers. With redefining the user experience in focus, you will get an opportunity to work on designs which makes the best systems. This enables you to learn end-to-end system while exceeding the highest expectations of quality, innovation and efficiency.

If you have strong fundamentals and a track record of tackling technical challenges, you are passionate about learning new skills and improving the value of your work, and you like to be tuned to the bigger-picture while diving deeply into the details to innovate and tackle problems- we invite you to join and grow with our team!

Description

You will work on the development of high-performance and high-speed AMS circuits used in Ser Des PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, high-speed analog signal chain, mixed-signal calibration and algorithms) with best in class power, performance, and area (PPA).

You will work with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create block-level specifications and execute on transistor-level implementation and behavioral modeling. You will drive mask design to implement layout view of designs. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these complex IPs, on regular basis you will interact with your peers/management to communicate progress and discuss new ideas making it a lively and interactive work environment.

Preferred Qualifications

Deep understanding of analog mixed-signal design with experience in high-speed serial links.

Understanding and experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters

Understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques

Good grasp and understanding of digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops)

Experience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts

Knowledge of Tx/Rx equalization techniques and circuits (e.g. CTLE, DFE, de-emphasis) for 64+ Gbps NRZ and PAM applications

Knowledge of CDR architectures and implementations

Knowledge of lab equipment and testing

Experience in Analog Mixed Signal circuit modeling and performance evaluation (e.g. System Verilog, Matlab, Python, VerilogAMS)

Hands-on experience in advanced CMOS technologies, design with Fin Fet technology

Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization

Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime)

Experience in lab testing of high-speed serial I/O, debug and data analysis techniques

Knowledge of common high-speed Ser Des protocols (e.g., PCIe, USB, DP, MPHY)

Skills in scripting and automation to enhance efficiency are highly desirable

Minimum Qualifications

BS and a minimum of 3 years relevant industry experience.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

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About Apple

Apple

Apple

Public

A technology company that designs, manufactures, and markets consumer electronics, personal computers, and software.

10,001+

Employees

Cupertino

Headquarters

$3.5T

Valuation

Reviews

4.0

10 reviews

Work Life Balance

4.0

Compensation

4.2

Culture

3.8

Career

3.5

Management

3.2

75%

Recommend to a Friend

Pros

Great coworkers and people

Excellent benefits and perks

Fast-paced and engaging work environment

Cons

High expectations and pressure

Management quality varies

Limited career progression opportunities

Salary Ranges

17,968 data points

L2

L3

L4

L5

L6

L2 · Business Analyst L2

0 reports

$114,215

total / year

Base

$45,686

Stock

$57,108

Bonus

$11,422

$79,951

$148,480

Interview Experience

5 interviews

Difficulty

3.4

/ 5

Duration

28-42 weeks

Offer Rate

20%

Experience

Positive 20%

Neutral 40%

Negative 40%

Interview Process

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Behavioral Interview

5

Onsite/Virtual Interviews

6

Team Matching

7

Offer

Common Questions

Coding/Algorithm

System Design

Behavioral/STAR

Technical Knowledge

Culture Fit