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Fellow FPGA Design Engineer
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- Penang, Malaysia
- Engineering
- 77036
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Job Description
WHAT YOU DO AT AMD CHANGES EVERYTHING:
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
As a fellow design engineer in our FPD team, you will be responsible for leading and optimizing the Fabric PPAC in the Adaptive & Embedded Computing Group (AECG). You will be driving new ideas and capabilities in the programmable fabric in current and future products. You will be leading the evaluation of future architectures by closing working with Architecture and Manufacturing teams. You will enable test chip designs and provide technical direction for skilled design engineers to help evaluate and realize key IP and technologies. You will be reviewing IP designs for quality, performance, power, and cost. Additionally, you will interact with the various Silicon development teams including digital and analog circuit designers, custom layout designers, physical designers, integration teams, and sign-off teams.
THE PERSON:
A successful candidate will work with senior silicon design engineers, architects, and micro-architects of the fabric team. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.
KEY RESPONSIBLITIES:
- Execute FPD team supporting Fabric research and development
- Enable new capabilities in the FPGA fabric to improve PPAC
- Evaluate key new features in the fabric with deep understanding of software capabilities
- Design Reviews to reduce product risk, improve PPAC and schedule
- Evaluate and develop yield improvement techniques
- Understand product roadmaps and enable new foundry technologies
- Leverage and deploy AMD solutions in the fabric
PREFERRED EXPERIENCE:
- Programmable logic fundamentals
- Next generation process and packaging technologies
- Binning and circuit margins, including VID, Aging
- Regulators, SRAM design, LUTs, NOCs, Clocking
- Circuit techniques for high performance and low power operations
- Industrial and automotive FUSA requirements
- Design for Manufacturing and Design for Debug
- Micro-architecture of dense, repeating structures
- Strong written and verbal communication skills
ACADEMIC CREDENTIALS:
- Bachelors or Masters degree in computer engineering/Electrical Engineering.
LOCATION:
Penang, Malaysia
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
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About AMD

AMD
PublicA semiconductor company that designs and develops graphics units, processors, and media solutions
10,001+
Employees
Santa Clara
Headquarters
Reviews
3.5
25 reviews
Work Life Balance
3.2
Compensation
4.1
Culture
3.6
Career
3.4
Management
3.1
65%
Recommend to a Friend
Pros
Good compensation and benefits
Positive work environment
Great management and coworkers
Cons
Poor work life balance
Micromanagement and excessive tracking
Too much pressure and workload
Salary Ranges
6 data points
L2
L3
L4
L5
L6
L2 · Data Analyst L2
0 reports
$76,430
total / year
Base
$30,572
Stock
$38,215
Bonus
$7,643
$53,501
$99,359
Interview Experience
5 interviews
Difficulty
3.6
/ 5
Duration
14-28 weeks
Offer Rate
60%
Experience
Positive 20%
Neutral 20%
Negative 60%
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Technical Interview
5
Hiring Manager Interview
6
Offer
Common Questions
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
Past Experience
System Design
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