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ASIC Verification Engineer

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• JOB_DESCRIPTION.SHARE.HTML
• Santa Clara, California
• Engineering
• 66111
• USD $136,000.00/Yr.
• USD $204,000.00/Yr.

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Job Description

WHAT YOU DO AT AMD CHANGES EVERYTHING:

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE TEAM:

AMD's NTSG - Network Technologies Solutions Group is a leading provider of data center networking technology. The distributed services platform will expand AMD's data center product portfolio with a high-performance data processing unit (DPU) and software stack that are already deployed at scale across cloud and enterprise customers including Goldman Sachs, IBM Cloud, Microsoft Azure and Oracle.

THE PERSON:

We are seeking a motivated Junior ASIC Verification Engineer to join our dynamic team. The ideal candidate should possess strong analytical and problem-solving skills and be eager to learn and grow within the field of ASIC verification.

We welcome candidates who are eager to expand their skills and knowledge in ASIC verification and contribute to exciting projects in a supportive environment. If you have a passion for technology and a desire to excel in your career, we encourage you to apply!

KEY RESPONSIBILITIES:

Languages and Tools:

• Familiarity with UVM, System Verilog, and C or C++
• Basic experience with System Verilog simulators and waveform debuggers
• Exposure to developing and executing test plans for Unit/IP/Subsystem/SOC level verification
• Experience in System Verilog test bench development, including stimulus, checkers, transactors/BFMs, assertions, and cover points
• Ability to identify bugs in architecture, functionality, and performance, along with strong overall debug and analytical skills
• Exposure to design and verification tools such as VCS or equivalent simulation tools and debugging tools like Debussy/DVE
• Understanding of Computer Architecture concepts

PREFERRED EXPERIENCE:

• Strong analytical and problem-solving skills
• Excellent debugging capabilities
• Ability to work collaboratively in a team environment and communicate effectively with peers

ACADEMIC CREDENTIALS:
BSEE or equivalent. MSEE preferred

LOCATION:
Santa Clara, CA

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.
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