招聘
Benefits & Perks
•Competitive salary and equity package
•Flexible work arrangements
•Parental leave
•Comprehensive health, dental, and vision insurance
•Equity
•Flexible Hours
•Parental Leave
•Healthcare
Required Skills
Python
JavaScript
TypeScript
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Senior Staff Engineer
- Power Architect / Microarchitect
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- Sydney, Australia
- Engineering
- 69555
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Job Description
WHAT YOU DO AT AMD CHANGES EVERYTHING:
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
As a GPU Power Architect / Microarchitect, you will lead AMD’s Data Center and Gaming GPU Power Optimization and Modeling, and drive innovation that’s required to help AMD win in these strategically crucial spaces. As a Lead engineer you will drive the microarchitecture and RTL optimizations and methodologies required to achieve the product power efficiency and performance goals. You will bring extensive technical domain knowledge, judgement, and leadership abilities to make strategic and tactical decisions that impact the roadmap, execution and market success of DGPU programs.
THE PERSON:
You have a deep understanding of processor pipelines and IP blocks at the micro-architectural and RTL level with a track record of innovation, execution and leadership in achieving world class Perf/Watt designs. You have a can-do attitude, excellent interpersonal, communication and leadership skills. You are able to collaborate with and influence a wide array of cross-functional engineering functions to achieve program goals.
KEY RESPONSIBILITIES:
- Lead a strong DGPU Power Optimization and Modeling team
- Drive Power Optimization and Modeling advances for multi-generational roadmap to maximize power and cost constrained performance for AMD graphics platforms
- Work with product teams to understand the PPA requirements, translate those into requirements for various IP blocks, evangelize for power efficiency and drive attainment.
- Guide the power optimization team and IP implementation teams in identifying power optimization opportunities, estimate ROI, and establish plan of record.
- Drive the Architecture, u Architectural optimization RTL design fixes to deliver the best design for Perf@Watt, Perf/Watt and Perf/$
- Specify Power Test Plans at Graphics Subsystem blocks and at Graphics level, review and sign-off on PTPX/Power Artist data readouts
- Use judgement in projecting dyn power improvements per IP and for whole SOC, and provide up-leveled readouts to project leadership and executives
- Lead and provide guidance to team developing IP Power Models of different kinds, and drive correlation to RTL and Silicon at various stages
- Coach and develop a team of worldclass Power Optimization and Modeling engineers.
PREFERRED EXPERIENCE:
- Expertise in Frontend development of Silicon
- Architectural, u Arch and RTL design.
- Proven hands-on experience and engineering leadership in GPU or CPU low power design and power modeling
- Solid background in electrical circuits, VLSI and IP design fundamentals
- Deep familiarity with ASIC/SoC Design cycles and methodologies including RTL, Verification, Emulation, Physical Design and post-si validation
- Fluent familiarity with power tools like Power Artist and PTPX.
- Principal or Staff Engineer level experience working with high-powered senior engineering teams driving critical initiatives and projects
- Collaboration with cross-functional, cross-geography technical teams to deliver industry leading performance and power efficiency in Compute SoC products
ACADEMIC QUALIFICATIONS:
- Undergraduate degree in related discipline.
LOCATION:
Sydney, Australia
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
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About AMD

AMD
PublicA semiconductor company that designs and develops graphics units, processors, and media solutions
10,001+
Employees
Santa Clara
Headquarters
Reviews
3.5
25 reviews
Work Life Balance
3.2
Compensation
4.1
Culture
3.6
Career
3.4
Management
3.1
65%
Recommend to a Friend
Pros
Good compensation and benefits
Positive work environment
Great management and coworkers
Cons
Poor work life balance
Micromanagement and excessive tracking
Too much pressure and workload
Salary Ranges
6 data points
L2
L3
L4
L5
L6
L2 · Data Analyst L2
0 reports
$76,430
total / year
Base
$30,572
Stock
$38,215
Bonus
$7,643
$53,501
$99,359
Interview Experience
5 interviews
Difficulty
3.6
/ 5
Duration
14-28 weeks
Offer Rate
60%
Experience
Positive 20%
Neutral 20%
Negative 60%
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Technical Interview
5
Hiring Manager Interview
6
Offer
Common Questions
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
Past Experience
System Design
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